HDL (Hardware Descriptive Language)

Description:

The scope of this project is to use a few buttons to select between math functions (addition, subtraction, multiplication, and nondecimal division), and display outputs (binary, decimal, hexadecimal) to an 8 wide 7 segment display. The board used was a Nexys 4 DDR, purchased from digilent. The code was written in Vim, with a syntax for verilog imported in. All code was compiled and simulated with Vivado 2018. The bit file generated by Vivado after verifying the simulation was downloaded to the board using digilent’s adept tool. This project was inspired by this tutorial

Breaking down the project:

Based on the description, we know we need two (2) buttons, a controller for eight (8) 7-Segment displays, and a mux for different math functions. I started the project with the display controller.

What does the display controller need? My solution is it needed a clock for timing, a reset, a data port, a port for its toggle, a port for determining which 7 segment display would be on, which LEDs on the 7 segment display would be on, and an LED code determining which state you were actually in. The start of the file looked like this:

Input and output list for the display module

As a quick lookup for my 7-Segment display values, I created a Look Up Table (LUT) to be used later on in the file for assigning the data with the correct display output.

With the LUT established, we must create some sort of refresh counter to determine how quickly the controller will cycle through the values so that to the user it appears that all 7-Seg displays are operating at the same time. To find the time needed for a counter, we can use an equation

Formula taken from https://www.digikey.com/eewiki/pages/viewpage.action?pageId=13599139

The clock on my board is 100MHz, thus, with a 20bit counter, we can get around a 10ms refresh rate (incidentally, this is also the refresh rate of my debouncer handlers taken from the url link attached to the image).

I added a few other data storage elements believing that the calculation of discerning the decimal at a certain place was causing my numbers to bleed into each other on the 7-segment displays. This was not the case, it was my selection of refresh rate creating too quick of change, so that the number from one 7-segment would be displayed for a moment on the other 7-segment. This problem was solved by increasing the spaces on the case statement you will see below:

Refresh rate and assignment to value that is checked for switching 7 segment

Use of unblocking assignment for solving for 100s, 10s, and 1s place

Binary selection based on data given to module

Decimal and Hexadecimal representation. Note the binary values of the case select. If these numbers are closer together, you will see the numbers “bleed” into one another

Final assignment based on what the case select decides due to the upper 3 bits of the refresh counter

With the display module finished, we need to create a math select module and a debouncer module for our two buttons.The math module is quite simplistic, and using only combinatorial logic, has no need for clocks or reset ports.

The top file is shown in a screen shot below. I used a quick counter in the top file to ensure that the display counter never went above 2’b10, which I never specified in my display module. The debouncer module was actually taken from this link, which has some great information regarding debouncers and how they function.

Here I create the input output list and assign the hierarchic modules for the debouncers

Here I create the logic for the buttons ensuring that the display button is not exceeded. Additionally, the other hierarchic modules are instantiated

Final Status:

The simple project works fine, and can cycle through displaying hex, decimal, and binary for an 8 bit data number generated from two 4 bit data storage elements.