`timescale 1ns/1ps


/*
* Chance Reimer
* Ver 1
* Date 8/30/2018
* this file works with a 7seg display generator by taking two 4 bit inputs and
* either multiplying, adding, or subtracting the bits
*/


module maths_LED(input reg [1:0] toggle_Math, //toggle set by something
		 input reg [3:0] data_A, //tied to switches
		 input reg [3:0] data_B, //tied to switches
		 output reg [7:0] dataOut, //sent to 7Seg Display module
	 	 output reg [2:0] statusLED); //informs user of status type

	always_comb
	begin
		case(toggle_Math)
			2'b00: begin
				statusLED = 3'b001;
				dataOut = data_A+data_B; //no need for full adders, this is a high level language fam
			end
			2'b01: begin
				statusLED = 3'b010;
			       	dataOut = data_A-data_B;
			end
			2'b10: begin
				statusLED = 3'b011;
				dataOut = data_A*data_B;
			end
			2'b11: begin
				statusLED = 3'b100;
				dataOut = data_A/data_B;
			end
		endcase
	end

endmodule